The present invention relates to decoding apparatus and method and, more particularly, to decoding apparatus and method for performing error correction processing on data that is subject to decoding in a direction of data rows and columns, such that error flags are generated to indicate decoding errors in data rows and columns based on the error correction processing.
Information reproduced via a light beam in an optical disc reproducing apparatus may have a read error caused by a scratch on the disc, for example. Error correction processing thus should be performed on the reproduced information.
FIG. 33 shows a representative optical disc reproducing apparatus. An optical disc 1 stores data, such as images and sounds, for example. An optical pickup 2 reads the information stored on the optical disc 1 using a laser beam. The reproduced signal outputted from the pickup 2 is demodulated by a demodulating circuit 3 and is supplied to a sector detecting circuit 4 for detecting a sector based on the reproduced signal. If a sector number assigned to a sector on the optical disc 1 is not detected, a sector number error signal is generated by the sector detecting circuit 4 for input to a track jump discriminating circuit 18.
An ECC (Error Correction Code) circuit 5 performs error detection and error correction on the reproduced signal received from the sector detecting circuit 4. If an unrecoverable error occurs, the ECC circuit 5 outputs an unrecoverable error signal to the track jump discriminating circuit 18. Otherwise, error-corrected data is then transmitted from the ECC circuit 5 to a ring buffer memory 7 to be stored therein.
Based on the output of the sector detecting circuit 4, a ring buffer controlling circuit 6 reads an address for each sector and designates a write address (via a write pointer WP) corresponding to the read address in the ring buffer memory 7. If a code request signal from a multiplexed data separating circuit 8 is received, the ring buffer controlling circuit 6 specifies the read address (via a read pointer RP) of the data previously written to the ring buffer memory 7, reads the data based on the read pointer RP, and supplies the read data to the multiplexed data separating circuit 8.
A header separating circuit 9 separates a pack header and a packet header from the data and supplies the separated pack header and packet header to a separator control circuit 11. According to a stream ID (stream identifier) of the packet header, the separator control circuit 11 separates time-division-multiplexed video code data from audio code data by sequentially switching an input terminal G between output terminals H1 and H2 in a switching circuit 10. The separated data is then supplied to a corresponding code buffer 13 or 15.
The video code buffer 13 generates a code request to the multiplexed data separating circuit 8 based on the data remaining in the buffer. Also, the video code buffer 13 stores the data supplied from the multiplexed data separating circuit 8 and receives a code request from a video decoding apparatus 14. The video decoding apparatus 14 decodes the video data for reproducing a video signal, such that the decoded video signal can be output from an output terminal 91.
Similarly, the audio code buffer 15 supplies a code request to the multiplexed data separating circuit 8, and stores the data supplied from separating circuit 8. In addition, the audio code buffer 15 receives a code request from an audio decoding apparatus 16. The audio decoding apparatus decodes the audio data for reproducing an audio signal and outputs the decoded audio signal from an output terminal 92.
Thus, the video and audio data are appropriately supplied from the corresponding circuits of the preceding stage via a transfer request from the corresponding circuits of the subsequent stage. For example, the video decoding apparatus 14 requests the video code buffer 13 for the data transfer, and the multiplexed data separating circuit 8 requests the ring buffer control circuit 6 for the data transfer. The requested data is transferred from the ring buffer memory 7 to the video decoding apparatus 14 in the direction reverse to the direction in which the transfer requests have been made.
Next, the recorded data format will be described. In the following example, data is recorded in units of a cluster (32K bytes). A representative cluster configuration is described below in detail.
Data of 2K bytes (2048 bytes) is extracted for one cluster, to which an overhead consisting of 16 bytes is added for a total of 2064 bytes, as shown in FIG. 34. Among other things, the overhead includes a sector address and an error detection code (EDC).
The sector data of 2064 bytes is arranged as 12 by 172 bytes. As shown in FIG. 35, sixteen sectors are accumulated to provide 192 by 172 bytes in a row by column configuration. Then, an outer parity (PO) of 16 bytes in the vertical direction is added to every column, and an inner parity (PI) of 10 bytes in the horizontal direction is added to every row. This results in a block of data 208 (that is, 192+16) by 182 (that is, 172+10) bytes, as shown in FIG. 35.
The outer parity section of 16 by 182 bytes is divided into 16 rows of 1 by 182 bytes each. The 16 rows are then interleaved among the 16 sectors (0 through 15) of 12 by 182 bytes each, as shown in FIG. 36. The data arranged as 13 (that is, 12+1) by 182 bytes comprises one sector.
The data of 208 by 182 bytes (as shown in FIG. 36) is split into two frames resulting in a 91-byte frame, as shown in FIG. 37. At the beginning of the frame, a frame sync signal (FS) of 2 bytes is added. Consequently, as shown in FIG. 37, one frame contains 93 bytes in the horizontal direction, resulting in a data block of 208 by (93.times.2) bytes which is one cluster (that is, one ECC block). The size of the actual data that is obtained by removing the overhead part is 32K bytes (that is, 2048.times.16/1024K bytes). The entire data is recorded on the optical disc 1 on a cluster-by-cluster basis.
Next is described the operation for generating an interpolation flag for interpolating error data following the data error correction in the example of FIG. 33.
FIG. 38 is a flowchart illustrating the processing operation when the ECC circuit 5 performs a first correction along the row (horizontal) direction using the inner parity PI (this correction operation is hereinafter referred to as PI1 correction), then performs another correction along the column (vertical) direction using the outer parity PO (this correction operation is hereinafter referred to as PO correction), and finally performs a third correction using the inner parity PI (this correction operation is hereinafter referred to as PI2 correction).
According to this processing, an ECC block is checked for an unrecoverable error following the PI1 correction in step S1. If no unrecoverable error is found, the process goes to step S4; if an unrecoverable error is found, the process goes to step S2.
In step S2, it is determined whether the optical disc has to be re-read (data reproduced again). Namely, it is determined whether:
(1) the ECC block having the unrecoverable error is to be read again from the optical disc 1; or PA1 (2) an interpolation flag is to be added to the ECC data block, and the resultant data is to be outputted. PA1 (1) the failed sector is to be read again from the optical disc 1; or PA1 (2) an interpolation flag is to be added to the failed data sector, and the resultant data is to be outputted.
If option (1) is selected, the process goes to step S3, where the optical disc 1 is read again. The process then returns to step S1. In option (2), the interpolation flag (that is, the flag indicating that interpolation is required) is added to the data of that block, and step S4 is carried out next.
In step S4, it is determined whether the result of the sector EDC check (the check using the error detection code inserted in each sector as described with reference to FIG. 34) is normal or not. Namely, each sector is checked for an error. If the result is found normal (that is, the sector has no error), the process continues with step S7, and the data is outputted without any change. If the result of the sector EDC check is found abnormal (that is, the sector has an error), step S5 is performed.
In step S5, it is determined whether the optical disc 1 is to be read again or not. Namely, it is determined whether:
If option (1) is selected, the process goes to step S6, in which case the failed sector is read again from the optical disc 1. Then, the process returns to step S1. In option (2), an interpolation flag is added to the data of that sector, and the process continues with step S7. In step S7, the processed data (in this case, the data with the interpolation flag) is outputted, upon which the processing is ended.
In the above-mentioned example, if the ECC circuit 5 detects data having an unrecoverable error, the interpolation flag is added to all of the data in that block. Each unit of data constituting the ECC block is 8 bits (1 byte) long, and the interpolation flag is 1 bit long. Therefore, the length of the data combined with the interpolation flag is 9 bits. Storing the 9-bit data requires a memory device that stores data on a 9-bit basis. Such a memory device, however, is not generally available and is, therefore, costlier than generally available memory devices, thereby posing a problem of increased fabrication cost for the decoding apparatus.
Further, if the ECC decoding is performed using a preselected length data serving as a processing unit (such as one ECC block, for example), the interpolation flag generating operation is applied to this entire processing unit. Therefore, the problem exists that the interpolation flag generating operation cannot be changed in units smaller than the processing unit, such as one ECC block. The interpolation flag generating operation cannot be changed in units of one sector, for example.